1. Field of the Invention
This invention relates to digital signal processors, and particularly processes for parallel processing of multiple data elements per instruction for multimedia functions such as video and audio encoding and decoding.
2. Description of Related Art
Programmable digital signal processors (DSPs) for multimedia applications such as real-time video encoding and decoding require considerable processing power for the large amount of data which must be processed within a limited time. Several architectures for digital signal processors are known. A general purpose architecture such employed in most microprocessors typically requires high operating frequencies to provide a DSP with sufficient computing power for real-time video encoding or decoding. This makes such DSP expensive.
A very long instruction word (VLIW) processor is a DSP having many functional units most of which perform different, relatively simple tasks. A single instruction for a VLIW DSP may be 128 bytes or longer and has separate parts which the separate functional units execute in parallel. VLIW DSPs have high computing power because many functional units can operate in parallel. VLIW DSPs also have relatively low cost because each functional unit is relatively small and simple. A problem for VLIW DSPs is inefficiency in handling input/output control, communication with a host computer, and other functions that do not lend themselves to parallel execution on the functional units of the VLIW DSP. Additionally, VLIW software differs from conventional software and can be difficult to develop because programming tools and programmers familiar with VLIW software architectures are scarce.
A DSP which provides reasonable cost, high computing power, and a familiar programming environment is sought for multimedia applications.